Disruptive By Design: Microelectronics Packaging
Microelectronics has been a hot topic in technology circles in recent years. Although the CHIPS and Science Act is a main driver of the latest resurgence, the defense industrial base’s reliance on microelectronics has been steadily increasing over the last decade. In the age of cloud computing, artificial intelligence and autonomous vehicles, it is difficult to find a military system that is not dependent upon some type of processor.
The basic makeup of a microchip includes a silicon semiconductor “die” or “chip” with transistors patterned onto it using various expensive and intensive processes. Microchips have virtually unlimited functionality—all possible through various transistor layout designs. But how are they actually functionalized? Surely an expensive piece of silicon cannot run Windows or mine bitcoin by just sitting on your desk.
To use a microchip for its given purpose, it must first be packaged into a system. A cellphone is one example of a system. A typical cellphone contains a circuit board, battery, antenna, connectors, a screen and a few buttons. The brain of the operation is the circuit board where the microelectronic processors are mounted. This is common with any electronics system, such as computers, artificial intelligence servers, military radios or even aircraft. The microchips need a board with other supporting components to function properly. The process of interfacing between the processor chip and the circuit board is called “packaging” by the microelectronics industry.
While electronic systems are trending toward smaller and lighter form factors, they are simultaneously demanding more computing power than ever. As semiconductor manufacturers reach the end of the physical limit of transistor density (Moore’s Law), the government and microelectronics industry are heavily invested in driving the next generation of computing. Longer-term solutions to the compute density challenge include using novel magnetic materials to perform “spintronic” computations or eventually functionalizing the quantum computer. A shorter-term solution is modernizing microelectronics packaging techniques to improve compute density.
A semiconductor’s packaging is typically done by spreading out various electrical connections on the silicon die in an organized manner where a circuit board can interface. This can be accomplished using tiny wires called wire bonds or, in a more advanced way, soldering microscopic solder balls to a redistribution layer. Eventually, the connections reach the outside of the packaged component where they connect to the circuit board via solder balls or metal leads.
Multichip devices have been around for many years; however, an emerging technique consists of stacking die on top of each other with very high-density interconnects and no longer using solder balls. This technique is called 3D-integration or 3D microelectronics packaging. As multiple chips are connected, the possibility of all-in-one solutions becomes available. Imagine having a single part that integrates numerous processors into a single, smaller package—as compared to space needed for the same parts on a conventional circuit board.
Another avenue to increase microelectronics packaging density is with 3D printing, referred to as “printed electronics.” Research has shown that it is possible to print liquid conductive inks onto chips and circuit boards at microscopic (10 micron) feature sizes. This technique enables die to be interconnected quickly, densely and, in some cases, directly onto the circuit board with no packaging required.
Packaging is just one of many areas of microelectronics and computing innovation. Clearly, the government and the Department of Defense recognize the need for broad innovation and onshoring in the industry. As the world becomes increasingly data-centric and the department attempts to adapt its legacy systems to modern-day threats, microelectronics will be at the crux of many advancements.
